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U6209B
1.3 GHz PLL for TV- and VCR- Tuner
Description
The U6209B is a single chip PLL frequency synthesizer with unidirectional I2C-bus control. This IC contains a high frequency prescaler which can be switched off. Five open collector switching outputs are available. The U6209B has a programmable 512/1024 reference divider.
Features
D 1.3 GHz divide-by-8 prescaler integrated
(can be bypassed)
D Four addresses selectable at Pin 10 for multi-tuner
application
D 15 bit counter accepts input frequencies up to
170 MHz
D 31.25 kHz ( -1.3 GHz ) / 3.90625 kHz ( -170 MHz )
tuning steps with 4MHz Xtal
D Programmable reference divider: divider by 512 or
1024
D Electrostatic protection according to MILSTD 883 D SO16 small package
D mP-controlled by
compatible)
I2C-Bus
(MC44818 data format
D Five port outputs (open collector )
Block Diagram
P4 P0 11 9 P1 P2 P3 876
AS 10 SCL 5 SDA 4
I2C Bus Control
5-bit latch
Switching Outputs
T1 7-bit latch 8-bit latch 5-bit latch
Gate
15-bit latch
PSC
T0 5I
RD1,2
OS
14 RFi 13
1 OR 8 Prescaler
15-bit counter
FPRD
Phase Detector
Charge Pump
16 VD
1 PD Osc. 512 / 1024 FRFD
12 Vs
15 GND
2
3 Crystal
95 10750
Figure 1.
Ordering Information
Extended Type Number U6209B-GFPG3 Package SO16 plastic package Remarks Taped and reeled
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
1 (11)
Preliminary Information
U6209B
Pin Configuration
PD Q1 Q2 SDA SCL P3 P2 P1 1 2 3 4 5 6 7 8
95 10758
16 15 14 13 12 11 10 9
VD GND RFi RFi VS P4 AS P0
Figure 2.
Circuit Description
The U6209B is a single-chip PLL designed for TV and VCR receiver systems. It consists of a bridgeable divide-by-8 prescaler with an integrated preamplifier, a 15-bit programmable divider, a crystal oscillator and a reference divider with two selectable divider ratios (512 / 1024), and a phase/frequency detector together with a charge pump which drives the tuning amplifier. Only one external transistor is required for varactor-line driving. The device can be controlled via I2C bus format. There are four programmable addresses selectable, programmed by applying a specific input voltage to the address-select input, enabling the use of up to four synthesizers in a system. Five open collector output port functions are included which are capable of sinking at least 10 mA. Oscillator frequency calculation: fvco = PSF x SF x frefosc / 1024 fvco: Locked frequency of voltage controlled oscillator PSF : Scaling factor of prescaler (1 or 8) SF : Scaling factor of programmable 15-bit divider frefosc :Reference oscillator frequency: 3.2/4 MHz crystal or external reference frequency In addition, there are port outputs available for bandswitching and other purposes.
2 (11)
Preliminary Information
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Application
A typical application is shown on page 10. All input / output interface circuits are shown on page 9. Some special features which are related to test- and alignment procedures for tuner production are explained together within the following I2C bus mode description. TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Symbol PD Q1 Q2 SDA SCL P3 P2 P1 P0 AS P4 Vs RFi RFi GND VD
Function Charge pump output Crystal Crystal Data in/output Clock Port output (open collector) Port output (open collector) Port output (open collector) Port output (open collector) Address select input Port output (open collector) Supply voltage RF input RF input Ground Active filter output
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All voltages are referred to GND (Pin 15).
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All voltages are referred to GND (Pin 15).
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
Thermal Resistance
Operating Range
Absolute Maximum Ratings
SO16 small package
Parameters Supply voltage Ambient temperature Input frequency Input frequency Programmable divider Crystal oscillator
In ON state Junction temperature Storage temperature
Pin 12 Pins 13,14 Pin 2 Pin 1 Pin 16 Pin 4 Pin 5 SDA output current open collector Pin 4 Address select voltage Pin 10 Port output current open collector Pins 6-9,11 Total port output current open collector Pins 6-9,11 Port output voltage in off state
Supply voltage RF input voltage Crystal input voltage Charge pump output voltage Active filter output voltage Bus input/ output voltage
Parameters
Parameters
PSC = 1 PSC = 0
Test Conditions / Pins Pin 12
Pins 6-9,11
Preliminary Information
Pins 13,14 Pins 13,14 Pin 2 Symbol Vs Tamb RFi RFi SF fXTAL Symbol VS RFi Q1 PD VD VSDA VSCL ISDA VAS P0-4 P0-4 P0-4 Symbol RthJA Tj Tstg Min. 4.5 0 64 1 256 3 Min. -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -1 -0.3 -1 -1 -0.3 -0.3 -40 -40 Value 110 Typ. Typ. 4 Max. 6 VS + 0.3 VS + 0.3 VS + 0.3 VS + 0.3 6 6 5 VS + 0.3 15 50 15
U6209B
Max. 5.5 70 1300 170 32767 4.48
6 125 125
Unit K/W
MHz
Unit V C MHz MHz
Unit V V V V V V V mA V mA mA V
V C C
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Test Conditions (unless otherwise specified) : VS = 5V, Tamb = 25C.
Notes: 1) RMS-voltage calculated from the measured available power on 50 W 2) Tested with one switch active
Electrical Characteristics
U6209B
4 (11) (prescaler OFF) Input sensitivity fi = 80 - 1000 MHz PSC = 1 Pin 13 fi = 1300 MHz PSC = 1 Pin 13 fi = 10 - 170 MHz PSC = 0 Pin 13 Port outputs P0-4 Pins 6-9, 11 (open collector) Leakage current VH = 13.5 V Saturation voltage IL = 10 mA Charge pump output (PD) Charge pump current `H' 5I = 1, VPD = 2 V Pin 1 Charge pump current `L' 5I = 0, VPD = 2 V Pin 1 Charge pump leakage T0 = 0, VPD = 2 V Pin 1 current Charge pump amplifier Pins 1, 16 gain Bus inputs (SDA,SCL) Input voltage high Pins 4, 5 Input voltage low Pins 4, 5 Input current high Vi `H' = VS Pins 4, 5 Input current low Vi `L' = 0 V Pins 4, 5 Output voltage SDA ISDA `L' = 2 mA Pin 4 (open collector) Address selection input (AS) Input current high VAS "H" = VS Pin 8 Input current low VAS "L" = 0 V Pin 8 Parameters Supply current (prescaler ON) Test Conditions / Pins SW 0-4 = 0; PSC =1 Pin 12 SW 0-4 = 0; PSC =0 Pin 12 Vi `H' Vi `L' Ii `H' Ii `L' VSDA `L' IiAS "H" IiAS "L" IL VSL 2) IPDH IPDL IPDTRI Symbol Is Vi Vi Vi Is 1) 1) 1) - 100 Min. 32 - 20 10 40 10 22 3
Preliminary Information
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96 6400 Typ. 42 180 50 5 28 Max. 52 315 315 315 0.4 5.5 1.5 10 10 0.5 10 35 mVrms mVrms mVrms Unit mA mA uA V V uA uA V uA uA nA uA V
U6209B
Functional Description
The U6209B is programmed via a 2-wire I2C bus data format. The three bus input Pins 4, 5, 10 are used as SDA, SCL and address select inputs. The data includes the scaling factor SF (15 bit) and port output information. There are some additional functions included for testing of the device.
I2C - Bus Description
The U6209B is controlled via a 2-wire I2C bus format by feeding data and clock signals into the SDA and SCL lines respectively. The table `I2C-BUS DATA FORMAT' describes the format of the data and shows how to select the device address by applying a voltage at pin 10. When the correct address byte has been received, the SDA line is pulled low by the device during the acknowledge period, and then also during the acknowledge periods, when additional data bytes are programmed. After the address transmission (first byte), data bytes can be sent to the device. There are four data bytes requested to fully program the device. The programmable divider latch is loaded after the 8th clock pulse of the second divider byte PDB2, the control and the port register latches are loaded after the 8th clock pulse of the control byte CB1 respectively post byte CB2. The table `I2C-BUS PULSE DIAGRAM' shows some possible data transfer examples. The programmable divider bytes PDB1 and PDB2 are stored in a 15-bit latch and control the division ratio of the 15-bit programmable divider. The control Byte CB1 enables the control of the the following special functions:
D T1-bit enables divider test mode when it is set to
logic 1
D T0-bit enables the charge pump to be disabled when
it is set to logic 1
D RD1 and RD2-bit allow selection of the reference
divider ratio
D PSC-bit switches prescaler off when it is set to
logic 0
D OS-bit disables the charge pump drive amplifier output when it is set to logic 1. When T1 is set to logic 1, the programmable divider output signal is switched to pin 7 and the reference divider output signal is switched to pin 6. The OS-bit function disables the complete PLL function. This enables tuner alignment by supplying the tuning voltage directly via the 30-V supply voltage of the tuner. The control byte CB2 programs the port outputs P0-4; a logic 0 for high impedance output (off) and a logic 1 for low impedance output (on).
D 5I-bit switches between low and high charge pump
current
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
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Preliminary Information
U6209B
I2C - Bus Description (continued)
Data Formats
Description Address byte Programmable divider byte 1 Programmable divider byte 2 Control byte 1 Control byte 2 MSP 1 0 n7 1 X 1 n14 n6 5I X 0 n13 n5 T1 X 0 n12 n4 T0 P4 Data Format 0 n11 n3 RD2 P3 AS1 n10 n2 RD1 P2 AS2 n9 n1 PSC P1 LSB 0 n8 n0 OS P0 A A A A A
AAAAAAAAAAAA A A A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA A AA AAAAAAAAAAAA A A A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAA A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA A A AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAA A A AA AAAAAAAAAAAAA A A AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAA A A AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AA AAAAAAAAAAAAAAAA AAAA AAAAAAAAAAAAAAAA AA A AAAAAAAAAAAAAAAA AAAA A
AAAA A A A A A A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A A A A A A A A AAAA A A A A A A A A A AA AAA AA AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA AAA AA AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA AAA AA AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AA AAA AA AA A AAA AA AA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA A AAA AA AA
A = Acknowledge; X = not used; Unused bits of control byte 2 should be 0 for lowest power consumption n0..n14 : PSC : T0, T1 : P0-4: 5I : OS : RD1, RD2: Scaling factor ( SF ) Prescaler on / off Testmode selection Port outputs Charge pump current switch Output switch Reference divider section SF = 16384 x n14 + 8192 x n13 + ... + 2 x n1 + n0 PSC = 1 : prescaler on ( PSF = 8 ) PSC = 0 : prescaler off ( PSF = 1 ) T1 = 1 : divider test mode on T1 = 0 : divider test mode off T0 = 1 : charge pump disable T0 = 0 : charge pump enable P0-4 = 1: open collector active 5I = 1 : high current 5I = 0 : low current OS = 1 : varicap drive disable OS = 0 : varicap drive enable RD1,RD2 : Reference divider selection RD2 RD1 0 0 0 1 1 0 1 1 Reference Divider Ratio 512 1024 1024 512 AS1 0 0 1 1 AS2 1 0 0 1 Address 1 2 3 4 Hex. Value C2 C0 C4 C6 Dec. Value 194 192 196 198 Voltage at Pin 10 open 0 to 10% VS 40 to 60% VS 90 to 100% VS 6 (11)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
U6209B
Pulse Diagram
95 10724
Address byte
/ A / 1.Byte
/A/
2.Byte
/ A / 3.Byte
/A/
4.Byte
/A/
SDA SCL START 1 2 3 4 5 6 7 8 9 1... 8 9 1... 8 9 1... 8 9 1... 8 9 STOP
Figure 3.
Data transfer examples START - ADR - PDB1 - PDB2 - CB1 - CB2 - STOP START - ADR - CB1 - CB2 - -PDB1 - PDB2 - STOP START - ADR - PDB1 - PDB2 - CB1 - STOP START - ADR - PDB1 - PDB2 - STOP START - ADR - CB1 - CB2 - STOP START - ADR - CB1 - STOP
Description START = Start condition ADR = Address byte PDB1 = Programmable divider byte 1 PDB2 = Programmable divider byte 2 CB1 = Control byte 1 CB2 = Control byte 2 STOP = Stop condition
Bus Timing
t
SDA
W STA 95 10725
t S STA
SCL
t LOW
t HIGH
tR
tF
t S STO
tH STA t S DAT
START CLOCK
t H DAT
STOP
DATACHANGE
Figure 4.
tS STT tW STT tH STT tLOW tHIGH
- Set-up time start - Waiting-time start - Hold-time start - "L"-Pulse width clock - "H"-Pulse width clock Test Conditions / Pins
tS DAT tH DAT tS STO tR tF
Symbol
- Set-up time data - Hold-time data - Set-up time stop - Rise time - Fall time Min. Typ. Max. 15 15 100 Unit
AAAA A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAA A A A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA AAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAA A A A A A A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAA AAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAA AAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAA A AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
Parameters Bus timing Rise time SDA, SCL Fall time SDA, SCL Clock frequency SCL Clock "H" Pulse Clock "L" Pulse Hold time start Waiting time start Set up time start Set-up time stop Set-up time data Hold time data tR tF fSCL 0 tHIGH 4 tLOWAAAA 4 tHSTA 4 tWStt 4 tSSTT 4 tSSTO 4 tSDAT 0.3 tHDAT 0
ms ms ms ms ms ms ms ms ms ms
kHz
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
7 (11)
Preliminary Information
U6209B
Typical Prescaler Input Sensitivity (Prescaler on: PSC = 1) :
Vi (mV RMS on 50W ) 1000
95 10726
100 Operating window 10
1
0,1 0 200 400 600 800 1000 1200 1400 1600 1800 2000
Frequency (MHz)
Figure 5.
Typical Prescaler Input Sensitivity (Prescaler off: PSC = 0) :
Vi (mV RMS on 50 W )
1000
95 10727
w
100
Operating window
10
1
0,1 0 50 100 150 200 250 300
Frequency (MHz)
Figure 6.
8 (11)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
U6209B
Input/Output Interface Circuits
Vref
Vs
95 10752
1.5K RF1 RF2
1.5K
Port
95 10735
Figure 7. RF input
Figure 10. Ports
Vs
Vs
1K AS
Crystal Q1
Crystal Q2
95 10736
95 10753
Figure 8. Reference oscillator
Figure 11. Address select input
Vs
Vs
60
2K PD
SDA / SCL SDA only ACK
OS (O/P Disable)
95 10751
VD 45K
95 10740
Figure 9. SCL and SDA input Figure 12. Loop amplifier
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
9 (11)
Preliminary Information
U6209B
Application Circuit
TUNER fTV f IF f VCO
33 V 22 k 39 n 4 MHz
PD
18 p
3 2
1n
13
RFi
1n
14 12 15
1 16
Vs GND AS SCL SDA from uC
22 k 180 n
VD
U6209B
7
P2 P1
10 5 4
95 10754
12 V
6 8
P0
9
11
P4
22 k 10 k 22 k 10 k 22 k 10 k
P3
Figure 13.
Package Dimensions
Small outline plastic package, 16-pin SO16 Dimensions in mm
94 8875
10 (11)
Preliminary Information
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
U6209B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
TELEFUNKEN Semiconductors Rev. A2, 30-Aug-96
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Preliminary Information

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